Mohamed Matar



I am currently working in AMD GPU Graphics team as Sr. Silicon Design Engineer.
I am part of the cache and memory management (CMM) subsytem for the next generation of AMD GPUs.
I am responsible for 3 blocks inside the the CMM subystem including the Graphics L1 cache.

Prior to that I was a grad student at the SoC lab in the University of British Columbia, working with Professor Mieszko Lis and Professor Lutz Lampe.
My research mainly focused on:
1) Hadware accelerators for 5G systems.
2) Hadware accelerators for Machine Learning workloads.


[Resume] [Linkedin]
E-mail: «first_name».«last_name»


M.Sc, University of British Columbia, Canada, July 2020
Thesis: Design exploration of faster than Nyquist equalizer system

B.Sc, Alexandria University, Egypt, June 2014
Thesis: ASIC implementation of TMS320C2X DSP

Professional Experience


Teaching Experience

1) (CPEN 291) Computer Engineering Design Studio I, University of British Columbia. (T2’20)
2) (CPEN 311) Digital Systems Design, University of British Columbia.(T2’18,T1’19, T2’19,T1’20)
3) (CSCE 231) Computer Organization, American University of Cairo.(Fall’15)

Awards & Activites

1) UBC Graduate Support Initiative (GSI) Awards (2018 –> 2020)
2) IEEE Xtreme 6.0 Competition (rated 9th in Egypt)
3) Instructor for C++ training - VLSI Egypt Summer Courses (July 2015)
4) Acheived 2nd in Mentor Graphics Contest of Design Verification of LC-3 Microcontroler (April 2015)